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            S3CC91A

            更新時間:2024-02-12 11:24:17 閱讀: 評論:0

            2024年2月12日發(fā)(作者:海南的特產)

            S3CC91A

            S3CC91A

            CMOS Microcontroller for

            Smart Card Applications

            Advanced Information

            Publication Number 31-S3-CC91A

            March 2006 (Rev.0)

            OVERVIEW

            The S3CC91A single-chip CMOS micro-controller is designed for smart card applications and is fabricated using

            an advanced 0.13-micron CMOS process. Its fast and reliable 16-bit CPU is bad on the CalmRISC16 CPU

            architecture and follows Harvard style.

            The S3CC91A has 36K bytes EEPROM, 6K bytes RAM, 192K bytes ROM, a 16-bit random number generator, a

            16-bit timer, a power-on ret, asynchronous rial I/O interface and numerous curity circuits.

            FEATURES

            CPU

            ? CalmRISC 16-bit RISC CPU core

            Memory Allocation

            ?

            ?

            ?

            192K bytes ROM

            36K bytes EEPROM

            6K bytes static RAM

            Interrupts

            ? 2 interrupt sources (FIQ, IRQ)

            Serial I/O interface

            ? UART for T=0, T=1(include CRC)

            Timers

            ? 16-bit Timer, 20-bit Watchdog timer

            Memory Protection Unit

            ?

            ?

            8ts Ba/Limit region registers

            4Mbytes configurable with 128bytes resolution

            EEPROM Write Operations

            ?

            ?

            ?

            ?

            1.5 ms fast era/write time

            1 to 128 bytes EEPROM era/write operations

            Min. 500,000 era/write cycles

            Min. 10 years data retention

            Random Number Generator

            ?

            ?

            16-bit random number generator

            Start and stop control

            Data Security

            ?

            ?

            ?

            128 bytes write protected curity area

            128 bytes of non erasable EEPROM

            Ret operations are lective if abnormal

            voltage/frequency/temperature/light

            exposure/power glitch/inner insulation

            removal/active shield removal detectors

            Crypto-coprocessor (TORNADOⅡ)

            ? Modulo exponential accelerator

            2048 bits operand size support

            Triple DES accelerator

            ? Built in hardware 3-DES

            Internal variable clock

            ? 33Mhz +- 10%

            Ret

            ? Power-on ret and external ret

            Operating Characteristics

            ?

            ?

            ?

            Power range: 1.62 – 5.5 V

            Operating frequency: 1 to 7.5 MHz

            Operating temperature: – 25 °C to + 85 °C

            Package

            ? 8-pin COB (conforms to ISO standard 7816)

            1

            Memory

            Protection UnitRAM

            6K-ByteEEPROM36K-ByteCalm16-bit RISC CPUAddress and Data BusROM

            192K-Byte I/O20-BitWatchdog Timer16-Bit TimerClock ControllerInterrupt ControllerSecurity ControllerRandom Number

            GeneratorTORNADO

            Figure 1. S3CC91A Block Diagram

            2

            DATA SHEET S3CC91A

            .C.

            Figure 2. Pin Assignments

            Table 1. S3CC91A Pin Descriptions

            Pin Number

            C1

            C2

            C3

            Pin Name

            VDD

            RST

            CLK

            Function Description

            Power input

            System ret input

            External clock input

            Pin Type

            Input

            Input

            Input/output

            C4 NC No connection

            C5 GND Ground

            C6 NC No connection

            C7 SIO Serial data input and output pin: External pull-up resistor should be connected to VDD

            C8 NC No connection

            3

            S3CC91A

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            標簽:特產   海南   作者
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